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CWE-1280 类漏洞列表 1

CWE-1280 类弱点 1 条 CVE 漏洞汇总，含 AI 中文分析。

MITRE CWE 官方描述
A product's hardware-based access control check occurs after the asset has been accessed. The product implements a hardware-based access control check. The asset should be accessible only after the check is successful. If, however, this operation is not atomic and the asset is accessed before the check is complete, the security of the system may be compromised.
常见影响 (1)
Access Control, Confidentiality, IntegrityModify Memory, Read Memory, Modify Application Data, Read Application Data, Gain Privileges or Assume Identity, Bypass Protection Mechanism
缓解措施 (1)
ImplementationImplement the access control check first. Access should only be given to asset if agent is authorized.
代码示例 (1)
Assume that the module foo_bar implements a protected register. The register content is the asset. Only transactions made by user id (indicated by signal usr_id) 0x4 are allowed to modify the register contents. The signal grant_access is used to provide access.
module foo_bar(data_out, usr_id, data_in, clk, rst_n); output reg [7:0] data_out; input wire [2:0] usr_id; input wire [7:0] data_in; input wire clk, rst_n; wire grant_access; always @ (posedge clk or negedge rst_n) begin if (!rst_n) data_out = 0; else data_out = (grant_access) ? data_in : data_out; assign grant_access = (usr_id == 3'h4) ? 1'b1 : 1'b0; end endmodule
Bad · Verilog
always @ (posedge clk or negedge rst_n) begin if (!rst_n) data_out = 0; else assign grant_access = (usr_id == 3'h4) ? 1'b1 : 1'b0; data_out = (grant_access) ? data_in : data_out; end endmodule
Good · Verilog
CVE ID标题CVSS风险等级Published
CVE-2026-3607 GitLab 安全漏洞 — GitLab 4.3 Medium2026-05-14

CWE-1280 是常见的弱点类别，本平台收录该类弱点关联的 1 条 CVE 漏洞。