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CWE-1423 类漏洞列表 2

CWE-1423 类弱点 2 条 CVE 漏洞汇总,含 AI 中文分析。

CWE-1423 属于硬件微架构层面的侧信道漏洞。攻击者利用共享的微架构预测状态,通过影响瞬态执行过程,跨越硬件边界建立隐蔽信道,从而窃取边界外可访问的敏感数据。开发者需依赖处理器厂商提供的微码更新和硬件补丁,启用特定的硬件隔离机制,并避免在关键敏感操作中使用易受瞬态执行攻击影响的指令序列,以缓解此类风险。

MITRE CWE 官方描述
CWE:CWE-1423 由共享的微架构预测器状态引起的敏感信息泄露,该状态影响瞬态执行 共享的微架构预测器状态可能允许代码跨越硬件边界影响瞬态执行,从而可能通过隐蔽信道暴露边界之外可访问的数据。 许多商用处理器具有指令集架构(ISA)特性,用于保护软件组件相互隔离。这些特性可以包括内存分段、虚拟内存、特权环、可信执行环境以及虚拟机等。例如,虚拟内存为每个进程提供独立的地址空间,从而防止进程访问彼此的私有数据。许多此类特性可用于在软件组件之间形成硬件强制的安全边界。当不同的软件组件(例如两个进程)跨越硬件边界共享微架构预测器状态时,一个组件中的代码可能能够影响另一个组件中的微架构预测器行为。如果预测器能够导致瞬态执行,那么共享的预测器状态可能允许攻击者影响受害者的瞬态执行,并通过监控隐蔽信道中的可观察差异(CWE-203),使攻击者能够推断受害者的私有数据 [REF-1400]。当处理器从一个组件转换到另一个组件时(例如,当进程进行系统调用以进入内核时),预测器状态可能会共享。许多商用处理器具有防止边界之前发生的微架构预测影响边界之后发生的预测的特性。预测器状态也可能在硬件线程之间共享,例如,在支持同时多线程(SMT)的处理器上的兄弟硬件线程。如果硬件线程同时在同一个软件组件中执行,这种共享可能是无害的;但如果其中一个兄弟是恶意软件组件,而另一个兄弟是受害软件组件,则可能暴露弱点。在硬件线程之间共享微架构预测器的处理器可能具有防止在一个硬件线程上发生的微架构预测影响在另一个硬件线程上发生的预测的特性。限制预测器状态在转换之间或在硬件线程之间共享的特性可能是始终开启的、默认开启的,或者可能需要软件选择加入。
常见影响 (1)
ConfidentialityRead Memory
缓解措施 (5)
Architecture and DesignThe hardware designer can attempt to prevent transient execution from causing observable discrepancies in specific covert channels.
Architecture and DesignHardware designers may choose to use microarchitectural bits to tag predictor entries. For example, each predictor entry may be tagged with a kernel-mode bit which, when set, indicates that the predictor entry was created in kernel mode. The processor can use this bit to enforce that predictions in the current mode must have been trained in the current mode. This can preve…
Effectiveness: Moderate
Architecture and DesignHardware designers may choose to sanitize microarchitectural predictor state (for example, branch prediction history) when the processor transitions to a different context, for example, whenever a system call is invoked. Alternatively, the hardware may expose instruction(s) that allow software to sanitize predictor state according to the user's threat model. For example, …
Effectiveness: Moderate
ImplementationSystem software can mitigate this weakness by invoking predictor-state-sanitizing operations (for example, the indirect branch prediction barrier on Intel x86) when switching from one context to another, according to the hardware vendor's recommendations.
Effectiveness: Moderate
Build and CompilationIf the weakness is exposed by a single instruction (or a small set of instructions), then the compiler (or JIT, etc.) can be configured to prevent the affected instruction(s) from being generated. One prominent example of this mitigation is retpoline ([REF-1414]).
Effectiveness: Limited
代码示例 (2)
Branch Target Injection (BTI) is a vulnerability that can allow an SMT hardware thread to maliciously train the indirect branch predictor state that is shared with its sibling hardware thread. A cross-thread BTI attack requires the attacker to find a vulnerable code sequence within the victim software. For example, the authors of [REF-1415] identified the following code se…
adc edi,dword ptr [ebx+edx+13BE13BDh] adc dl,byte ptr [edi] ... indirect_branch_site: jmp dword ptr [rsi]   # at this point attacker knows edx, controls edi and ebx
Bad · x86 Assembly
BTI can also allow software in one execution context to maliciously train branch predictor entries that can be used in another context. For example, on some processors user-mode software may be able to train predictor entries that can also be used after transitioning into kernel mode, such as after invoking a system call. This vulnerability does not necessarily require SMT…
CVE ID标题CVSS风险等级Published
CVE-2025-23269 NVIDIA Jetson Linux 安全漏洞 — Jetson Orin and Xavier Devices 4.7 Medium2025-07-17
CVE-2024-10929 ARM Cortex-A72、Cortex-A73和Cortex-A75 安全漏洞 — Cortex-A72 9.8 -2025-01-22

CWE-1423 是常见的弱点类别,本平台收录该类弱点关联的 2 条 CVE 漏洞。